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  • Key Features of Field Programmable Gate Arrays (FPGAs)

    A field programmable gate array (FPGA) utilizes an array of logic blocks, which can be configured by the user. The term “field programmable” implies that the device is programmable outside the factory where it is produced. The internal architecture of a FPGA device has three main parts, namely: The figure below illustrates the architecture of…

  • Basic Structure of a Programmable ROM (PROM)

    The architecture of a programmable read only memory (PROM) allows the user to use the hardware in implementing an arbitrary combinational function of a given number of inputs. When utilized as a memory device, n inputs of the ROM (called address lines) and m outputs (called data lines) can be used to store 2nm-bit words.…

  • Flip-Flops in Digital Circuits

    Since digital data is usually stored in the form bits, digital memory devices such as the computer random access memory (RAM) requires a way for storing and switching between the two binary states. A flip-flop is a sequential logic device that can perform this operation. The flip-flop is called a bistable device, because it has…

  • SIMD, MISD & MIMD Multiple Processor Architectures

    Introduction Parallel processing, in which applications are partitioned into multiple tasks that are executed concurrently by multiple processors is used for high-throughput needs where even the single fastest computer cannot be good enough. Multiple processor system architectures differ widely in the number of processors used, the techniques in which applications are partitioned and mapped onto…

  • The Pentium Series of Microprocessors

    The Pentium processors have a 64-bit data bus which is a major advancement in personal computer CPU design. In actual fact, the Pentium family of processors has its origins in the Intel 486 processor, and has similar instruction set with a few additional instructions. Pentium Series (P5, P54 and P54C) of Microprocessors The first Pentium…

  • Computer Memory Organization

    A computer system uses memory elements for storing program instructions, data, and other information. From the perspective of the instruction set, a memory is an array of words, each identified by a unique address that indicates its location within the memory. In other words, each memory location is assigned a unique address that identifies a…

  • Basic Microprocessor Instructions

    Microprocessors perform various basic operations that include data transfer instructions, arithmetic instructions, logic instructions, control transfer instructions and machine control operations. This set of commands (instructions set) used to control the functions of a microprocessor is specific to a given microprocessor. In this article, we look at examples of these instructions focusing on Intel 8085…

  • 4 Types of Processor Architectures

    Processor architecture can be classified as one of the following four architectures: Accumulator-Based Processor Architecture In the accumulator-based processor architecture, illustrated above, instructions begin and end in accumulators (Acc A and Acc B), which are specially designated registers. In a typical operation, one of the operands is found in the accumulator and the other is…

  • Basic Architecture of a Microprocessor

    The microprocessor is typically referred to as the central processing unit (CPU). It is the part of the processor system which processes the data, fetching instructions from memory, decoding them and executing them. The internal structure (architecture) – depends on the microprocessor concerned. The figure below illustrates a general architecture of a microprocessor: The following…

  • How Special Function Registers (SFRs) are Mapped into Memory Space

    There are two basic primary architectures used for mapping special function registers into memory space. In the first type of arrangement, I/O space and memory space are separated as illustrated in Figure 1.0. The I/O devices have a separate address space, which is accomplished by either an extra I/O pin on the CPU physical interface…