Choosing Between TTL & CMOS for Your Digital Logic Design

There are two families of logic devices called TTL and CMOS. For those who are new to these devices, TTL stands for transistor transistor logic devices and CMOS for complementary metal-oxide semiconductor devices. Bipolar junction transistors are the building blocks for TTL logic, whereas MOSFETs are the building blocks for CMOS logic. Usually, any combinational or sequential logic circuit can be built with either family or with a mix of the two families. However, to do so correctly, you need to understand the differences in the electronic characteristics of each family.

The two states of a digital device are defined by voltages occurring within specified acceptable ranges. For this comparison, we are presuming that both families are powered by a 5 V DC supply, however, CMOS unlike TTL, can be powered with a DC supply between 3 V and 18 V. For a TTL digital input, logic zero (0) or low (L) is defined as a value less than 0.8 V and a logic one (1) or high (H) is defined as a value greater than 2.0 V. The digital output of a TTL device typically ranges between 0 and 0.5 V for low and between 2.7 V and 5 V for high. The input voltage range 0.8 V to 2.0 V between the logic 0 and logic 1 states is a dead zone where the input state is undefined.

Figure 1.0 TTL input and output levels

For a CMOS digital input, logic zero (0) or low (L) is defined as a value less than 1.5 V and logic high is defined as a value greater than 3.5 V. The digital output of a CMOS device typically ranges between 0 and 0.05 V for low and between 4.95 V and 5 V for high. The input voltage range 1.5 V to 3.5 V is a dead zone where the input state is undefined.

Figure 1.1 CMOS input and output levels

Besides understanding the voltage levels, it is important to know the input and output current characteristics of the devices when you are interfacing the digital devices. The important characteristics are the amount of current a device can source (produce) when the output is high and the amount of current the device can sink (draw) when the output is low. In the manufacturer data sheets for digital devices, these characteristics are usually labelled as I_OHor high-level output current, for the sourcing capability and I_OL or low-level output current for the sinking capability.

TTL logic switches between states by forward biasing one of the two output transistors. This output circuit is called a totem pole configuration, where two bipolar junction transistors are stacked between power and ground. When the upper transistor is forward biased and the bottom transistor is OFF, the output is high. The resistor, transistor, and diode drop the actual output voltage to a value typically about 3.4 V. When the lower transistor is forward biased and the top transistor is OFF, the output is low. The TTL device sources current when there is a high output and sinks current when the output is low. The value of the sink and source current depend on the TTL subfamily.

Figure 1.2 TTL output circuit

To get a full picture of this, read: How TTL works

When the output of a TTL device is connected to the input of another, the TTL device dissipates power continuously regardless of whether the output is high or low.

CMOS logic ICs utilize complementary pairs of p-type and n-type enhancement-mode MOS transistors at their outputs, thus the name complementary MOS (CMOS).

Figure 1.3 CMOS output circuit

Making a reference to the CMOS output circuit above; if the input signal to this output stage is high the p-type transistor (top) is OFF, and the n-type transistor (bottom) is ON, so the output is pulled low. When the input is low, the top transistor is ON and the bottom transistor is OFF, so the output is pulled high. When the output is high, the device sources current; and when the output is low, the device sinks current if there is a load attached to the output. Since the MOSFET gates are insulated, CMOS devices consume power only when switching between states or when there is a load attached. Thus, a key difference between CMOS and TTL is that TTL devices require power continuously.

The following are reasons why CMOS is often recommended over TTL:

The wide power supply range of CMOS (3-18 V) provides more design flexibility and allows the use of less tightly regulated power supplies.
When an output is unloaded or connected to other CMOS devices, CMOS requires power only when an output switches its logic state. Hence, CMOS is useful in battery-operated applications where power is limited.

Key Limitations of CMOS include:

CMOS requires negligible input current; however, its output current is also small compared to TTL. This limits the ability of CMOS to drive large TTL fan-out or other high current devices.
CMOS is sensitive to static discharge even with internal protective diodes. Protective packaging and static discharge during handling and fabrication are necessary; if not, the devices are easily damaged.

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John Mulindi

John Mulindi has a background in a technical field and he writes on topics ranging from automation, computer systems, embedded systems, mechatronics to measurement and control.