Computer Memory Organization

A computer system uses memory elements for storing program instructions, data, and other information. From the perspective of the instruction set, a memory is an array of words, each identified by a unique address that indicates its location within the memory. In other words, each memory location is assigned a unique address that identifies a memory module and a specific storage location within that module.

Each memory word includes one or more addressable bytes as demonstrated in the figures below. The number of bits in the data path of the CPU establishes the number of bytes per word of the memory. For example, the Intel 8051 has an 8-bit data path, and, therefore, has a byte-wide memory organization as illustrated in Figure 1.0.

Figure 1.0 Byte-addressable memory organizations (2^N bytes): byte-wide

The Freescale HCS12 has a 16-bit data path, and thus, supports operations on both bytes and words. As a result, the memory must be byte-addressable, that is, each byte of memory must have a unique address. Figure 1.1 and 1.2 shows two 16-bit memory formats. The Freescale HCS12 uses the little endian format, that is, the least significant byte of data is placed in the lower number address. In the big endian format, the least significant byte of data is placed in the higher numbered address.

Figure 1.1 Byte-addressable memory organizations (2^N bytes): word-wide (little endian format)

Figure 1.2 Byte-addressable memory organizations (2^N bytes): word-wide (big endian format)

The Pentium has a 32-bit data path and supports operations on 32-bit words, 16-bit half words, and 8-bit bytes. Similarly, ARM has a 32-bit data path, but all arithmetic and logical operations are performed exclusively on 32-bit data. Bytes, half-words and words can be transferred between the ARM CPU registers and memory, but a byte or half-word read from memory is converted into 32 bits before being placed in the target register. These CPUs memory is organized as 4 bytes per word as illustrated in Figure 1.3. Both CPUs can access one, two or all 4 bytes of a memory word with a single read or write operation. Whereas the Pentium uses the little endian format, the ARM process is unique in that it can be configured at power-up for either big or little endian format, as may desired by the system designer or engineer.

The number of addressable memory locations in a computer is a function of the number of bits used by the CPU to represent memory addresses. An N-bit address can address 2^N locations. For instance, the 8051 and HCS12 use a 16-bit address, allowing them to address 2¹⁶ = 64 kB of memory. The ARM uses 32 address bits and thus can address 2³² = 4 GB of memory, organized as 4 bytes per word for a total of 2³⁰ = 1 G words.

Figure 1.3 Byte-addressable memory organizations (2^N bytes): double-word-wide (little endian format)

Figure 1.4 Byte-addressable memory organizations (2^N bytes): double-word-wide (big endian format)

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John Mulindi

John Mulindi has a background in a technical field and he writes on topics ranging from automation, computer systems, embedded systems, mechatronics to measurement and control.