Microprocessors

Peripheral Devices used with Microprocessors

Microprocessors and peripheral devices provide a complete solution in enhancing complex application environments. In this article, we look at some of the common peripheral devices that are used along with the microprocessor in a microcomputer system.

The different peripheral devices used in a microcomputer system include:

  • Programmable timer/counter
  • EPROM
  • RAM
  • Programmable interrupt controller (PIC)
  • Direct memory access (DMA)
  • Programmable communication interface (Universal synchronous/asynchronous receiver/transmitter (USART)
  • Math coprocessor
  • Programmable keyboard/display interface
  • Programmable peripheral interface (PPI)
  • Programmable CRT controller
  • Clock generators
  • Octal Bus Transceivers
  • Floppy disk controller

Programmable Counter/Timer

A programmable counter/timer is used for the generation of an accurate time delay for event counting, rate generation, complex waveform generation applications and so forth. Programmable timer/counter devices include Intel’s 8254 and 8253 family of devices. The Intel 8254 contains three 16-bit counters that can be programmed to operate in several different modes. Some of the functions that are common to microcomputers and implementable with 8254 are a real-time clock, an event counter, a digital one-shot, programmable rate generator, a square-wave generator, a binary rate multiplier, a complex waveform generator and a complex motor controller. It is available in 24-pin CERDIP and plastic DIP packages.

Programmable Interrupt Controller (PIC)

A programmable interrupt controller (PIC) is a device that allows priority levels to be assigned to its interrupt outputs. It operates as an overall manager in an interrupt-driven system environment. When the device has multiple interrupt outputs, it will assert them in the order of their relative priority. Common modes of a PIC include hard priorities, rotating priorities and cascading priorities. Intel 8259 is a family of programmable interrupt controllers (PICs) designed and built for use with the Intel 8085 and Intel 8086 microprocessors. The family consisted of the 8259, 8259A, and 8259B PICs, nonetheless, a number of manufacturers make a wide range of compatible chips nowadays.

Direct Memory Access (DMA) Controller

In a direct memory access (DMA) data transfer scheme, data is transferred directly from an I/O device to memory, or vice versa, without going through the CPU. The DMA controller is used to control the process of data transfer. Its primary function is to generate, upon a peripheral request, a sequential memory address that will allow the peripheral to read or write data directly to or from memory. Example of DMA controller is the Intel’s 8257. It is a four-channel memory access (DMA) controller. It is specifically designed to simplify the transfer of data at high speeds for microcomputer systems. It has a priority logic that resolves the peripheral requests and issues a composite hold request to the CPU. It maintains the DMA cycle count for each channel and outputs a control signal to notify the peripheral that the programmed number of DMA cycles is completed.

Programmable Communication Interface (PCI)

Programmable communication interfaces (PCIs) are interface devices that are used for data communication application with microprocessors. They basically convert the data from the microprocessor into a format acceptable for communication and also convert the incoming data into a format understood by the microprocessor.

The Intel 8251 is a PCI device designed for Intel’s 8085, 8086, and 8088 microprocessors and is used in serial communication applications. It is a 28-pin chip available in DIP and PLCC packages. It is basically a universal synchronous/asynchronous receiver/transmitter (USART) that accepts data characters from the CPU in parallel format and then converts them into a continuous serial data stream for transmission. Simultaneously, it can receive a serial data stream and convert it into parallel data characters for the CPU. The USART will signal the CPU whenever it can accept a new character for transmission or whenever it has received a character for the CPU.

Math Coprocessor

Math coprocessors are special-purpose processing units that assist the microprocessor in performing certain mathematical operations. The arithmetic operations performed by the coprocessor are floating-point operations, trigonometric, logarithmic and exponential functions, and so forth. Examples of Math coprocessors include: Intel’s 8087, 80287, etc. The 8087 numeric coprocessor provides the instruction and data types required for high-performance numeric application, providing up to 100 times the performance of a CPU alone. The 80287 numeric processor extension (NPX) provides arithmetic instructions for a variety of numeric data types in 80286 systems. It also executes various built-in transcendental functions such as tangent and log functions.

Programmable Keyboard/Display Interface

The programmable keyboard/display interfaces are devices used for interfacing the keyboard and the display to the microprocessor. The keyboard section of the device debounces the keyboard entries and provides data to the microprocessor in the desired format. The display section converts the data output of the microprocessor into the form desired by the display device in use.

The 8279 is a general-purpose programmable keyboard and display I/O interface device designed for use with Intel Microprocessors. The keyboard portion can provide a scanned interface to a 64-contant key matrix. Keyboard entries are debounced and strobbed in eight-character FIFO. If more than eight characters are entered, overrun status is set. Key entries set the interrupt output line to the CPU. The display portion provides a scanned display interface for LED, incandescent and other display devices. Both numeric and alphanumeric segment displays may be used.

Programmable Peripheral Interface (PPI)

Programmable peripheral interface devices are used to interface devices with the microprocessors. Intel’s 8255 PPI was widely used programmable parallel I/O device. It was available in PDIP, CerDIP, PLCC, and MQPF packages. 8255 is programmed to transfer data under various conditions, from simple I/O to interrupt I/O. It can function in bit reset (BSR) mode or I/O mode. In I/O mode, it has three ports, namely port A, port B and port C. The I/O mode is further divided into three different modes, namely mode 0, mode 1 and mode 2. In mode 0, all ports function as simple I/O ports. Mode 1 is a handshake mode whereby port A and or B use bits from port C as handshake signals. In mode 2, port A can be set up for bidirectional data transfer using handshake signals from port C and port B can be set up either in mode 0 or in mode 1. In BSR mode, individual bits in port C can be set or reset.

Programmable CRT Controller

The programmable CRT controller is a device to interface CRT raster scan displays with the microprocessor systems. Its basic function is to refresh the display by buffering the information from the main memory and keeping track of the display position of the screen. An example of a programmable CRT controller includes Intel’s 8275H. It allows a simple interface to almost raster scan CRT display with minimal external hardware and software overheads. The number of display character per row and the number of character rows per frame are software programmable.

Clock Generator

The clock generator is a circuit that produces a timing signal for synchronization of the circuit’s operation. Examples of clock generators used in microprocessor systems include Intel’s 8284 and 82284. The 8284 generates the system clock for the 8086 and 8088 processors. It requires a crystal or a TTL signal source for producing clock waveforms. It provides local READY and MULTIBUS READY synchronization.

The 82284 is a clock generator/driver that provides clock signals for the 80286 processor and support components. It also contains logic to supply READY to the CPU from either asynchronous or synchronous sources and synchronous RESET from an asynchronous input with hysteresis. The 82284 is packaged in 18-pin DIP and contains a crystal-controlled oscillator, MOS clock generator, a peripheral clock generator, multi bus ready synchronization logic and system reset generation logic.

Octal Bus Transceiver

Bus transceivers are devices with a high-output drive capability for interconnections with data buses. In a microprocessor-based system they provide an interface between the microprocessor bus and the system data bus. The Intel 8286 is an 8-bit bipolar transceiver with a three-state output that is used in variety of buffering applications in microcomputer systems. It comes in a 20-pin DIP package.

Floppy Disk Controller

The floppy disk controller device is used for disk drive selection, head loading, issue read/write commands, data separation and serial to parallel and parallel to serial conversion of data. Examples of this device includes: Intel’s 82078, 82077, and 8272.

John Mulindi

John Mulindi has a background in a technical field and he writes on topics ranging from automation, computer systems, embedded systems, mechatronics to measurement and control.

Recent Posts

Rigid-Flex PCBs: Enhancing Durability and Flexibility in Electronic Devices

The world of electronics is constantly evolving, allowing designers and manufacturers to push the boundaries…

2 months ago

Key Features of PIC16X84 Family of Microcontrollers

PIC microcontrollers are fabricated by Microchip Technology. PIC16C84 and PIC16F84 are the two microcontrollers in…

9 months ago

ADD Instruction in Intel 8051 (MCS-51) Microcontroller

The ADD instruction tells the microcontroller’s CPU to add the source byte to register A…

9 months ago

Main Features of Intel 8086 Microprocessor

8-bit microprocessors are limited in their speed (the number of instructions that can be executed…

9 months ago

Basic Features of 68HC11 Family of Microcontrollers

The 68HC11 (also abbreviated as 6811 or HC11) is an 8-bit microcontroller that was introduced…

9 months ago

Process Synchronization using Semaphores

Mutual exclusion typically imposes some conditions on access to a given resource by two or…

10 months ago