Computer Programming Model

The programming model of a computer system refers to the assembly language programmer’s view of the system. From the programmer’s outlook, a computer is a collection of registers and memory for storing information, a set of instructions to manipulate data and control program flow, and various types of data that can be manipulated by the instruction set.

A computer instruction specifies to the control unit what operation is to be performed, where to obtain the operands for the operation, and where to store the result of the operation, if result is produced. Like other information, an instruction must be encoded into patterns of ones and zeros. Instruction codes are generally subdivided into separately coded fields as shown in Figure 1, these fields include the operation code (opcode), which specifies what the instruction is to do, and one or more operand specifies, which indicate the operands to be used for the instruction.

The number of operand specifiers encoded in an instruction differs between CPUs. Most reduced instruction set computer (RISC) processors like ARM, MIPs, PowerPC, and so forth use a three-operand format for all ALU instructions, specifying two source operands and a destination. For example, the following ARM instruction tells the CPU to read two operands from registers R2 and R3, add the operands, and store the sum in register R1.

ADD R1,R2,R3   ;(R2)+(R3)→R1

Figure 1: Instruction code format

Pentium ALU instructions use a two-operand format. Both operand sources are specified, and the left-hand operand is also the destination for the result. The instruction below adds the operands in registers AX and BX, and stores the result in AX:

ADD AX,BX    ;(AX)+(BX)→AX

The source operand that was originally in AX is replaced with the computed sum. Thus, if the programmer wishes to retain the original source operand, it must be copied from AX to some other place before executing the above instruction. This provides less flexibility for the programmer than the three-operand format, but instructions can be more compact, since they require only two operand specifiers.

The HCS12 CPUs use a one-operand format. The programmer specifies one of the source operands. The other source operand comes from a default location, with that location also receiving the result. The instruction below adds the constant 15 to the accumulator register A, with the sum stored in A, replacing the source operand.

ADDA   #15    ; (A) +15 →A

The opcode ADDA tells the CPU that accumulator A provides the second operand and is the destination. The operand must be moved into accumulator A by previous instruction, and the result may need to be stored elsewhere to allow A to be used for a subsequent instruction. This provides less flexibility for the programmer, but instructions can be shorter because there is only one operand specifier. Note that the 8051 and Pentium specify the source of the data as the right-hand operand and the destination as the left-hand operand, on the other hand, the HCS12 specifies one operand as part of the instruction mnemonic.

The instructions operands may be embedded within the instruction code, retrieved from CPU registers, or read from external memory locations. Some CPUs also recognize special I/O device addresses; others access information from I/O devices via their memory address space. RISC architectures restrict ALU operands to register immediate values only; memory may only be accessed by special load and store instructions that move data between registers and memory.

You may also read:

John Mulindi

John Mulindi has a background in a technical field and he writes on topics ranging from automation, computer systems, embedded systems, mechatronics to measurement and control.